王志功.光纤通信集成电路设计[M].北京:高等教育出版社.2003.

池保勇,余志平,石秉学.CMOS射频集成电路分析与设计[M].北京:清华大学出版社,2006年.

Mozhgan Mansuri,Chih-Kong Ken Yang.Jitter optimization based on phase-locked loop design parameters[J].IEEE Journal of Solid-State Circuits.1998,37(11):1375-1382.

Ali Hajimiri,Thomas H.Lee.A General Theory of Phase Noise in Electrical Oscillators[J].IEEE Journal of Solid-State Circuits.1998,33(2):179-194.

Soliman S,Yuan F,Raahemifar K.An overview of design techniques for CMOS phase detectors[C].IEEE International Symposium on Circuits and Systems,2002.ISCAS2002,5:457-460.

Lee J,Razavi B.Analysis and Modeling of Bang-Bang Clock and Data Recovery Circuits[J].IEEE Journal of Solid-State Circuits.2004,39(9):1723-1732.

Juarez-Hernandez E,Diaz-Sanchez A.A novel CMOS charge pump circuit with positive feedback for PLL applications[C].The8th IEEE International Conference on Electronics,Circuits and Systems,2001,1:349-352.

Dean Banerjee.PLL Performance,Simulation and Design[M].Oxford University Press,2003.

Maneatis,J.G.Low-jitter process-independent DLL and PLL based on self-biasedtechniques[J].IEEE Journal of Solid-State Circuits.1996,31(11):1723-1732.